Flip Flop
 
 

Purpose: To discover what the ABEL program 'regtry.abl' from the Digital Systems web site does.

Procedure:
Download and save the 'regtry.abl' file from the Digital Systems Lab web server (when downloading, select the file type as 'All files'). The next step is to open the file using the ispDesignEXPERT.
Double click on the ISP Design Expert icon. The ISP Design Expert window will appear. This is how it looks like:

 
 
 
  Click on the 'File' tab and select ' New project '. When prompted to save the newly created project, I saved it as "flipflop.syn". We can change the Name of the project by double clicking the upper icon in the sources box. The default device is (ispLSI5384VA-125LB388). We change the type of device by double clicking on the yellow CPLD icon:  
   
 
If you get some messages like this choose OK and then confirm the change by choosing "Yes":
 
   
 
We import a new source by choosing 'Source' and then 'Import...'. We choose the regtry.abl file. This is how the Text Editor looks like:
 
   
 
You can see the program in the capture above or you can download it from here: regtry.abl. There is more detailed information about the making of the program in "The Program" section
 
 
Select the device (M4-64/32-15JC) from the left pane and double click the 'Constraint Editor' on the Right pane. Once the constraint editor has initialized, select ' LOC ' from the toolbar to assign the correct PIN numbers to the switches and segments ( the box next to the Output must be checked in order to get the full list of the segments). Use the " pin out of the CPLD (both MACH4-32/32 and MACH4-64/32) on the development board " datasheet from the Digital Systems Lab web server for the correct pin assignments.
!REMARK: when assigning the pins use the leftmost column of the table to get the correct pin numbers. DO NOT use the second one. The first time when I did the program I made the wrong associations and got compilation errors.
 
   
 
The image above represents the Pin assignments window. Once all the pins and switches have been assigned, minimize the constraint editor, plug in the JTAG download cable into the parallel port of the laptop, connect the power supply to the development board and run ' Fit Design ' (found on the right navigator window of the ispDesignExpert) by double clicking on it. Once the ' Fit Design ' has completed, a JEDEC file by the name of ' flipflop.jed ' was created in the same directory as the "test3.abl'.

The next step involves downloading the design on to the M4-64/32 CPLD on the development board. In order to do this, run the ' ispVM System '. With the power supply connected to the development board and the JTAG download cable connected to the laptop, click on ' Scan ' in the toolbar to automatically detect the CPLD on the development board. Once the M4-64/32 appears on the device list, double click on it to get the device information dialog box. The image below is a capture from the ispVM System:

 
   
 
You can change the description for the device manually and change the path for the .jed file:
 
   
 
After specifying the JED file click on OK, click on the ' Go ' in the toolbar to begin the download. Once the download is completed you are ready to test the system.
 
 
The Program:

The programme generates the basic use of flip-flops in an electronic device. First, there is a pin assignment for the switches and segments U26 and U22. I commented on the pin declarations of U23 and U24 because it is not required in the programme we are running.
-Pin declarations tell the compiler which symbolic names are associated with the devices external pins.
-'com' stands for combinational output and 'reg' stands for registered output

The clock is then selected by (SelClk) and then the nodes are defined in the programme the same way the pins were declared as in the following lines.

// a part of the programme for illustration
" node defs.
//Co_n0 node istype 'com';
Q4n0 node istype 'reg';
Q3n0 node istype 'reg';
Q2n0 node istype 'reg';
Q1n0 node istype 'reg';

-The same thing is done for NODE n1 too.

After that the switch inputs and the set of output signals are declared as below.

SWINP = [/SW1, /SW2, /SW3];

// these are again just the parts of the main programme
" Sets for output signals
SEG10n0 = [!U22A, !U22B, !U22C, !U22D, !U22E, !U22F, !U22G];
SEG10n1 = [!U26A, !U26B, !U26C, !U26D, !U26E, !U26F, !U26G];


//example of state descriptions for the
S0 = [1, 1, 1, 1, 1, 1, 0];
S1 = [0, 1, 1, 0, 0, 0, 0];


The state description for the segments means that the state is such that for one particular configuration some of its segments are active ( it blinks), where as others are inactive.

For example from the first configuration S0, all the segments are active except for 'G'.

The 'Equations' section describes the response of the circuit to the inputs. The statement
[Q4n0, Q3n0, Q2n0, Q1n0].CLK = SelClk;" Clock for counter

acts as a counter and allows us to adjust the speed of the outputs. The second statement
[Q4n0, Q3n0, Q2n0, Q1n0].AR = (SWINP = = 4);

allows us to reset the six state machine to the default state or the reset state and restart the loop. 'SWINP = = 4' represents the switch input set [1,0,0] (binary representation of 4); so the machine is reset when Switch 1 is pressed.

The 'State_diagram' section controls the flow of the program. It lists all the possible states and the subsequent arguments of the machine.

The 'Truth Table' for both the segment follows the set of state descriptions (S0 to S9).
The decimal output in the SSD follows the configuration of the binary values. There are two truth tables, one for each node.

 
 

Observations:

-when either of SW2 or SW3 was pressed the digits in the Segments U26 and U22 were reset to zero. When SW1 was pressed, the digits start increasing by one and continued until we pressed the reset button (i.e. SW1 in this case).

 
 

Problems and Conclusion:

Again the common error you might experience is that the pins and segment are actually ' active low ' and not ' active high '. You can correct this problem by simply negating (!) the switches and segments in the PIN description part of the program.

In this lab session I actually found out why the CPLD with which we are working is called MACH 4 - 64/32 CPLD. It is because it has 64 NODES AND 32 PINS.
I also found out in this lesson more about the structure of the CPLD. The nodes are like variables (like a macro in C++ ). The pins are a special case of node where the node's content outputs a signal. Every node has a 1 bit flip flop.
I also found out more info about the CLOCK. This device is like a conductor in a simphonic concert. It sets the way in which the other components work, their rythm and it goes and goes and goes.

 
 
Modifications to the program:

Using the flip flop and some knowledge gained in the state machine experiment it was easy to create a 4 digit "stopwatch". All four seven-segments were used for displaying a number between 0 and 9999. This number was incremented with the speed of the clock. One switch could be used to stop the counter and to start it again.
All Seven-Segments are used in this program. Four quadruples of nodes are declared and grouped in the four sets digit1 to digit4. As usual, the segments are grouped as well as the buttons. Constants representing the different decimal numbers displayed on the segments are defined. An additional node run is declared. The interesting part happens in the equations-part. digit1 is clocked to the the adjustable clock. In addition to that it may only change its value when run is equal to 1. digit2 is triggered when digit1 is equal to 0, which always happens when digit1 makes a transition from 9 to 1. digit3 is then triggered when digit2 becomes 0, and so on. The register variable run is triggered whenever the user presses button 2. Whenever button 2 is pressed, run changes its status from 0 to 1 or vice versa.

In the four state_diagram statements each of them describes the behaviour of one digit variable. They go from 0 to 9 and back to 0 on the next transition. Also, they change the display of their respective seven-segment accordingly.

This is the program:

MODULE Stopwatch

TITLE 'Stopwatch'

" Inputs from evaluationkit
!SW1 pin;
!SW2 pin;
!SW3 pin;

" Seven Segments
!U22A pin;
!U22B pin;
!U22C pin;
!U22D pin;
!U22E pin;
!U22F pin;
!U22G pin;

!U24A pin;
!U24B pin;
!U24C pin;
!U24D pin;
!U24E pin;
!U24F pin;
!U24G pin;

!U23A pin;
!U23B pin;
!U23C pin;
!U23D pin;
!U23E pin;
!U23F pin;
!U23G pin;

!U26A pin;
!U26B pin;
!U26C pin;
!U26D pin;
!U26E pin;
!U26F pin;
!U26G pin;

" Clock inputs
SelClk pin;

" node defs
Q4n0 node istype 'reg';
Q3n0 node istype 'reg';
Q2n0 node istype 'reg';
Q1n0 node istype 'reg';

Q4n1 node istype 'reg';
Q3n1 node istype 'reg';
Q2n1 node istype 'reg';
Q1n1 node istype 'reg';

Q4n2 node istype 'reg';
Q3n2 node istype 'reg';
Q2n2 node istype 'reg';
Q1n2 node istype 'reg';

Q4n3 node istype 'reg';
Q3n3 node istype 'reg';
Q2n3 node istype 'reg';
Q1n3 node istype 'reg';

" start stop switch
run node istype 'reg';

" Sets for inputsignals
SWINP = [SW1, SW2, SW3];

" Sets for output signals
SEG10n0 = [U22A, U22B, U22C, U22D, U22E, U22F, U22G];
SEG10n1 = [U26A, U26B, U26C, U26D, U26E, U26F, U26G];
SEG10n2 = [U23A, U23B, U23C, U23D, U23E, U23F, U23G];
SEG10n3 = [U24A, U24B, U24C, U24D, U24E, U24F, U24G];

S0 = [1, 1, 1, 1, 1, 1, 0];
S1 = [0, 1, 1, 0, 0, 0, 0];
S2 = [1, 1, 0, 1, 1, 0, 1];
S3 = [1, 1, 1, 1, 0, 0, 1];
S4 = [0, 1, 1, 0, 0, 1, 1];
S5 = [1, 0, 1, 1, 0, 1, 1];
S6 = [1, 0, 1, 1, 1, 1, 1];
S7 = [1, 1, 1, 0, 0, 0, 0];
S8 = [1, 1, 1, 1, 1, 1, 1];
S9 = [1, 1, 1, 1, 0, 1, 1];

" definition of state registers
digit1 = [Q4n0, Q3n0, Q2n0, Q1n0];
digit2 = [Q4n1, Q3n1, Q2n1, Q1n1];
digit3 = [Q4n2, Q3n2, Q2n2, Q1n2];
digit4 = [Q4n3, Q3n3, Q2n3, Q1n3];


equations


digit1.CLK = ( SelClk & run == 1);
digit1.AR = (SWINP == 4);

digit2.CLK = (digit1 == 0);
digit2.AR = (SWINP == 4);

digit3.CLK = (digit2 == 0);
digit3.AR = (SWINP == 4);

digit4.CLK = (digit3 == 0);
digit4.AR = (SWINP == 4);

run.CLK = (SWINP == 2);
run.AR = (SWINP == 4);


when (run == 0) then run := 1 else run := 0;

state_diagram digit1

state 0 : SEG10n0 = S0;

goto 1;

state 1 : SEG10n0 = S1;

goto 2;

state 2 : SEG10n0 = S2;

goto 3;

state 3 : SEG10n0 = S3;

goto 4;

state 4 : SEG10n0 = S4;

goto 5;

state 5 : SEG10n0 = S5;

goto 6;

state 6 : SEG10n0 = S6;

goto 7;

state 7 : SEG10n0 = S7;

goto 8;

state 8 : SEG10n0 = S8;

goto 9;

state 9 : SEG10n0 = S9;

goto 0;


state_diagram digit2

state 0 : SEG10n1 = S0;

goto 1;

state 1 : SEG10n1 = S1;

goto 2;

state 2 : SEG10n1 = S2;

goto 3;

state 3 : SEG10n1 = S3;

goto 4;

state 4 : SEG10n1 = S4;

goto 5;

state 5 : SEG10n1 = S5;

goto 6;

state 6 : SEG10n1 = S6;

goto 7;

state 7 : SEG10n1 = S7;

goto 8;

state 8 : SEG10n1 = S8;

goto 9;

state 9 : SEG10n1 = S9;

goto 0;

state_diagram digit3

state 0 : SEG10n2 = S0;

goto 1;

state 1 : SEG10n = S1;

goto 2;

state 2 : SEG10n2 = S2;

goto 3;

state 3 : SEG10n2 = S3;

goto 4;

state 4 : SEG10n2 = S4;

goto 5;

state 5 : SEG10n2 = S5;

goto 6;

state 6 : SEG10n2 = S6;

goto 7;

state 7 : SEG10n2 = S7;

goto 8;

state 8 : SEG10n2 = S8;

goto 9;

state 9 : SEG10n2 = S9;

goto 0;

state_diagram digit4

state 0 : SEG10n3 = S0;

goto 1;

state 1 : SEG10n3 = S1;

goto 2;

state 2 : SEG10n3 = S2;

goto 3;

state 3 : SEG10n3 = S3;

goto 4;

state 4 : SEG10n3 = S4;

goto 5;

state 5 : SEG10n3 = S5;

goto 6;

state 6 : SEG10n3 = S6;

goto 7;

state 7 : SEG10n3 = S7;

goto 8;

state 8 : SEG10n3 = S8;

goto 9;

state 9 : SEG10n3 = S9;

goto 0;

end

 
 
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The movie of the experiment -this is the .avi demonstration of how the program works.
The STOPWATCH experiment movie.